- 米国およびシンガポールのチームメンバーと協力してNAND-CMOSロードマップを立案し,製品ロードマップに適用をすすめます
- パフォーマンスとコスト効率の両面において,デバイスポートフォリオの改善方法を提案します
- 次世代のデバイスのためにシリコン実験を計画・実行し,特性の解析を行います
- 設計エンジニアと協力しながら,トランジスタ・ターゲットの定義,トランジスタ・モデルの提供,重要なレイアウト制約のある設計ルールの最適化を進めます
- TCADシミュレーション・グループと協力して,目標を達成するためのトランジスタ構造の戦略を策定します
- トランジスタの特性評価テストストラクチャの定義,設計ルール検証,プロセスモニター項目の定義
- 製造部門と協力して,トランジスタが期待どおりに動作していることを確認し,歩留まり/信頼性を改善,検証します
- チームメンバーの指導などを通じて,協力的な開発スタイルとチームスピリットを育み,実現します
- 電気工学または関連分野での修士号または博士号,または同等の経験
- CMOSデバイスの設計,シミュレーション,特性評価の分野で5年以上の開発経験
- 高電圧で動作するCMOSデバイス開発経験
- アナログ設計の概念の理解
- プレゼンテーションスキル,英語でのコミュニケーション,チームワークとメンタリングスキル As a NAND CMOS Device Integration Engineer, you will help set the direction for current and future CMOS technology for Micron's NAND Memory Technology Roadmap.
- Together with your peers, you craft and complete our NAND-CMOS roadmap and make sure to align to product roadmaps
- You give directions on how to improve our device portfolio, both in performance and cost efficiency
- You define, complete, and analyze silicon experiments for future device generations
- Collaborate with Design Engineers to define transistor targets, deliver transistor models, and optimize critical layout constrained Design Rules
- Work with TCAD simulation group to develop strategies for transistor structures to meet targets
- You strive to ensure that transistor models are accurately targeted to anticipate final silicon
- Define electrical test structures for transistors, isolation, design rule verification, and process monitoring
- Highly motivated to ensure transistors are developed meeting the required reliability standards
- You take initiative to collaborate with Manufacturing to ensure transistors are performing as expected and to debug yield/reliability issues
- You foster and enable a collaborative working style and team spirit by mentoring less experienced colleagues
- MS/PhD or equivalent experience in Electrical Engineering or related field, PhD in Semiconductor Device Technology preferred
- 5 plus years industry experience in the field of CMOS device design, simulation, characterization
- Experience in developing advanced logic transistor technologies
- Experience in developing Analog FETs operating at Higher Voltages
- Understanding of analog design concepts
- Good presentation skills
- Excellent team and mentoring skills
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Senior/Principal R&D NAND CMOS Process Integration Engineer - Minato, 日本 - Micron
説明
Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
JR53052 Senior/Principal R&D NAND CMOS Process Integration Engineer (Evergreen)(English follows after Japanese)
シニアまたはプリンシパル・デバイスエンジニアとして,最先端NANDのCMOSデバイスインテグレーション技術開発を担当し,また,将来のCMOS技術の方向性の設定を支援します.
設計チームと協力して,デバイス特性要求を設定し,それを達成するためのトランジスタ構造を定義します.デバイス技術開発をリードし,プロセスインテグレーション,設計,デザインルール,モデリング,信頼性, TCAD(Technology Computer-Aided Design),パラメトリックテストの各チームと協力しながら開発を遂行します.
開発された技術を組み込んだ際の,製造歩留まりやデバイス特性を検証します.
業務内容
求める経験と能力
You will work with the Design Team to set electrical targets and define transistor structures to meet these targets. You will guide the device technology development and be in close relation with Process Integration, Design Engineering, Design, Design Rules, Reliability, Transistor Modeling, TCAD (Technology Computer-Aided Design), and Parametric Test, to name a few. In addition, you will ensure that the developed technology is manufacturable and highly yielding and that these considerations are designed into the technology from the start.
Responsibilities include, but not limited to:
Minimum Qualifications:
