Application Engineer in charge of semiconductor package design - Yokohama, 日本 - CADENCE SYSTEMS JAPAN

    CADENCE SYSTEMS JAPAN
    CADENCE SYSTEMS JAPAN Yokohama, 日本

    2週間前

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    説明

    Description


    • Customer support, consulting and project management based on Cadence's semiconductor design environment.

    Main product:Allegro Package Designer Plus(APD Plus), Integrity 3DIC, Innovus, etc.

    Qualification Requirements


    • Majored in Electrical Engineering or some other equivalent


    • Has the knowledge and desire to take on new challenges

    Experiences/Skills


    • At least 5 years of experience for PCB or package layout design and knowledge, or at least 5 years of experience for layout tool support.


    • Programing experiences, such as SKILL, Perl, Tcl, Python etc.


    • Have knowledge for 2.5D/3D-IC designs platform


    • Good organization and communication skills between difference groups and customers.


    • Communication skill and technical conversation in English.


    • Must have business Japanese skill (N1 level, Minimum 3 years of business experience in Japan "using Japanese").

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